Paper:
Abstract:
This work describes an alternative technique for hardware and software implementation
of RAM based Boolean neural networks, which describes neurons using the VHDL language. An
example of application consisting of the classification problem of the British mail scanned
address is attended with a RAM architecture presenting 340 x 12-input neurons. The weights
of each neuron are represented by its truth table and described using simple logic gates
(AND, OR, and NOT), aiming to make possible the network logic minimisation and its hardware
implementation by the ALTERA MAX+PLUS II fast prototyping package. The
developed software tool allows the specification and training of the network. Then, its VHDL
description is generated to be interpreted and minimised by the ALTERA EPLD design system. If
it is not necessary to have high speed processing or if pre-processing phases are needed, the
ANN can be implemented in software. The software strategy makes use of the direct translation
of the VHDL description into a simplified C language code. Once the user has specified and
taught the network, this approach makes possible automatic prototyping of RAM neural networks
in software and hardware.
Eduardo do Valle Simões,
simoes@icmc.usp.br
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